/*
 * MAX86161.h
 *
 *  Created on: Oct 16, 2020
 *      Author: andrey
 */

#ifndef INC_DEVICES_PPG_MAX86161_H_
#define INC_DEVICES_PPG_MAX86161_H_

#include "stdint.h"
#include "devices/io_device_types.h"
#include "FreeRTOS.h"
#include "queue.h"

#define MAXM86161_BYTES_PER_CHANNEL									3U
#define MAXM86161_BYTES_NUMBER_OF_CHANNELS							3U
#define MAXM86161_BYTES_PER_SAMPLE									MAXM86161_BYTES_PER_CHANNEL * MAXM86161_BYTES_NUMBER_OF_CHANNELS
#define MAX86161_TXRX_BUFFER_LENGTH									255U * MAXM86161_BYTES_PER_CHANNEL * MAXM86161_BYTES_NUMBER_OF_CHANNELS

#define MAX86161_PART_ID											0x36
/*
 * Registers addresses section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_ADDRESS_INTERRUPT_STATUS_1				0x00
#define MAX86161_REGISTER_ADDRESS_INTERRUPT_STATUS_2				0x01

#define MAX86161_REGISTER_ADDRESS_INTERRUPT_ENABLE_1				0x02
#define MAX86161_REGISTER_ADDRESS_INTERRUPT_ENABLE_2				0x03

#define MAX86161_REGISTER_ADDRESS_FIFO_WRITE_POINTER				0x04
#define MAX86161_REGISTER_ADDRESS_FIFO_READ_POINTER					0x05
#define MAX86161_REGISTER_ADDRESS_FIFO_OVERFLOW_CONTER				0x06
#define MAX86161_REGISTER_ADDRESS_FIFO_DATA_COUNTER					0x07
#define MAX86161_REGISTER_ADDRESS_FIFO_DATA_REGISTER				0x08
#define MAX86161_REGISTER_ADDRESS_FIFO_CONFIGURATION_1				0x09
#define MAX86161_REGISTER_ADDRESS_FIFO_CONFIGURATION_2				0x0A

#define MAX86161_REGISTER_ADDRESS_SYSTEM_CONTROL					0x0D
#define MAX86161_REGISTER_ADDRESS_PPG_SYNC_CONTROL					0x10
#define MAX86161_REGISTER_ADDRESS_PPG_CONFIGURATION_1				0x11
#define MAX86161_REGISTER_ADDRESS_PPG_CONFIGURATION_2				0x12
#define MAX86161_REGISTER_ADDRESS_PPG_CONFIGURATION_3				0x13

#define MAX86161_REGISTER_ADDRESS_PROX_INTERRUPT_THRESHOLD			0x14
#define MAX86161_REGISTER_ADDRESS_PHOTO_DIODE_BIAS					0x15

#define MAX86161_REGISTER_ADDRESS_PICKET_FENCE						0x16

#define MAX86161_REGISTER_ADDRESS_LED_SEQ_CONTROL_1					0x20
#define MAX86161_REGISTER_ADDRESS_LED_SEQ_CONTROL_2					0x21
#define MAX86161_REGISTER_ADDRESS_LED_SEQ_CONTROL_3					0x22

#define MAX86161_REGISTER_ADDRESS_LED1_PULSE_AMPLITUDE				0x23
#define MAX86161_REGISTER_ADDRESS_LED2_PULSE_AMPLITUDE				0x24
#define MAX86161_REGISTER_ADDRESS_LED3_PULSE_AMPLITUDE				0x25

#define MAX86161_REGISTER_ADDRESS_LED_PILOT_PULSE_AMPLITUDE			0x29

#define MAX86161_REGISTER_ADDRESS_LED_RANGE_1						0x2A

#define MAX86161_REGISTER_ADDRESS_S1_HIGH_RES_DAC1					0x2C
#define MAX86161_REGISTER_ADDRESS_S2_HIGH_RES_DAC1					0x2D
#define MAX86161_REGISTER_ADDRESS_S3_HIGH_RES_DAC1					0x2E
#define MAX86161_REGISTER_ADDRESS_S4_HIGH_RES_DAC1					0x2F
#define MAX86161_REGISTER_ADDRESS_S5_HIGH_RES_DAC1					0x30
#define MAX86161_REGISTER_ADDRESS_S6_HIGH_RES_DAC1					0x31

#define MAX86161_REGISTER_ADDRESS_DIE_TEMPERATURE					0x40
#define MAX86161_REGISTER_ADDRESS_DIE_TEMPERATURE_INTEGER			0x41
#define MAX86161_REGISTER_ADDRESS_DIE_TEMPERATURE_FRACTION			0x42

#define MAX86161_REGISTER_ADDRESS_DAC_CALIBRATION_ENABLE			0x50

#define MAX86161_REGISTER_ADDRESS_SHA_COMMAND						0xF0
#define MAX86161_REGISTER_ADDRESS_SHA_CONFIGURATION					0xF1

#define MAX86161_REGISTER_ADDRESS_MEMORY_CONTROL					0xF2
#define MAX86161_REGISTER_ADDRESS_MEMORY_INDEX						0xF3
#define MAX86161_REGISTER_ADDRESS_MEMORY_DATA						0xF4


#define MAX86161_REGISTER_ADDRESS_REVISION_ID						0xFE
#define MAX86161_REGISTER_ADDRESS_PART_ID							0xFF
/*
 * Registers addresses section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * LED Sequence Control register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * LED Sequence Control register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * INTERRUPT STATUS 1 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_INTERRUPT_STATUS_1_A_FULL_POS				7U
#define MAX86161_REGISTER_INTERRUPT_STATUS_1_A_FULL					1U << MAX86161_REGISTER_INTERRUPT_STATUS_1_A_FULL_POS

#define MAX86161_REGISTER_INTERRUPT_STATUS_1_DATA_RDY_POS			6U
#define MAX86161_REGISTER_INTERRUPT_STATUS_1_DATA_RDY				1U << MAX86161_REGISTER_INTERRUPT_STATUS_1_DATA_RDY_POS

#define MAX86161_REGISTER_INTERRUPT_STATUS_1_ALC_OVF_POS			5U
#define MAX86161_REGISTER_INTERRUPT_STATUS_1_ALC_OVF				1U << MAX86161_REGISTER_INTERRUPT_STATUS_1_ALC_OVF_POS

#define MAX86161_REGISTER_INTERRUPT_STATUS_1_PROX_INT_POS			4U
#define MAX86161_REGISTER_INTERRUPT_STATUS_1_PROX_INT				1U << MAX86161_REGISTER_INTERRUPT_STATUS_1_PROX_INT_POS

#define MAX86161_REGISTER_INTERRUPT_STATUS_1_LED_COMPB_POS			3U
#define MAX86161_REGISTER_INTERRUPT_STATUS_1_LED_COMPB				1U << MAX86161_REGISTER_INTERRUPT_STATUS_1_LED_COMPB_POS

#define MAX86161_REGISTER_INTERRUPT_STATUS_1_DIE_TEMP_RDY_POS		2U
#define MAX86161_REGISTER_INTERRUPT_STATUS_1_DIE_TEMP_RDY			1U << MAX86161_REGISTER_INTERRUPT_STATUS_1_DIE_TEMP_RDY_POS

#define MAX86161_REGISTER_INTERRUPT_STATUS_1_PWR_RDY_POS			0U
#define MAX86161_REGISTER_INTERRUPT_STATUS_1_PWR_RDY				1U << MAX86161_REGISTER_INTERRUPT_STATUS_1_PWR_RDY_POS
/*
 * INTERRUPT STATUS 1 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * INTERRUPT STATUS 2 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_INTERRUPT_STATUS_2_SHA_DONE_POS			0U
#define MAX86161_REGISTER_INTERRUPT_STATUS_2_SHA_DONE				1U << MAX86161_REGISTER_INTERRUPT_STATUS_2_SHA_DONE_POS

/*
 * INTERRUPT STATUS 2 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * INTERRUPT ENABLE 1 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_INTERRUPT_ENABLE_1_A_FULL_EN_POS			7U
#define MAX86161_REGISTER_INTERRUPT_ENABLE_1_A_FULL_EN				1U << MAX86161_REGISTER_INTERRUPT_ENABLE_1_A_FULL_EN_POS

#define MAX86161_REGISTER_INTERRUPT_ENABLE_1_DATA_RDY_EN_POS		6U
#define MAX86161_REGISTER_INTERRUPT_ENABLE_1_DATA_RDY_EN			1U << MAX86161_REGISTER_INTERRUPT_ENABLE_1_DATA_RDY_EN_POS

#define MAX86161_REGISTER_INTERRUPT_ENABLE_1_ALC_OVF_EN_POS			5U
#define MAX86161_REGISTER_INTERRUPT_ENABLE_1_ALC_OVF_EN				1U << MAX86161_REGISTER_INTERRUPT_ENABLE_1_ALC_OVF_EN_POS

#define MAX86161_REGISTER_INTERRUPT_ENABLE_1_PROX_INT_EN_POS		4U
#define MAX86161_REGISTER_INTERRUPT_ENABLE_1_PROX_INT_EN			1U << MAX86161_REGISTER_INTERRUPT_ENABLE_1_PROX_INT_EN_POS

#define MAX86161_REGISTER_INTERRUPT_ENABLE_1_LED_COMPB_EN_POS		3U
#define MAX86161_REGISTER_INTERRUPT_ENABLE_1_LED_COMPB_EN			1U << MAX86161_REGISTER_INTERRUPT_ENABLE_1_LED_COMPB_EN_POS

#define MAX86161_REGISTER_INTERRUPT_ENABLE_1_DIE_TEMP_RDY_EN_POS	2U
#define MAX86161_REGISTER_INTERRUPT_ENABLE_1_DIE_TEMP_RDY_EN		1U << MAX86161_REGISTER_INTERRUPT_ENABLE_1_DIE_TEMP_RDY_EN_POS
/*
 * INTERRUPT ENABLE 1 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * INTERRUPT ENABLE 2 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_INTERRUPT_ENABLE_2_SHA_DONE_EN_POS		0U
#define MAX86161_REGISTER_INTERRUPT_ENABLE_2_SHA_DONE_EN			1U << MAX86161_REGISTER_INTERRUPT_ENABLE_2_SHA_DONE_EN_POS
/*
 * INTERRUPT ENABLE 2 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * FIFO register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_FIFO_TAG_PPG1_LEDC1_DATA					1U
#define MAX86161_REGISTER_FIFO_TAG_PPG1_LEDC2_DATA					2U
#define MAX86161_REGISTER_FIFO_TAG_PPG1_LEDC3_DATA					3U
#define MAX86161_REGISTER_FIFO_TAG_PPG1_LEDC4_DATA					4U
#define MAX86161_REGISTER_FIFO_TAG_PPG1_LEDC5_DATA					5U
#define MAX86161_REGISTER_FIFO_TAG_PPG1_LEDC6_DATA					6U
#define MAX86161_REGISTER_FIFO_TAG_PPG2_LEDC1_DATA					7U
#define MAX86161_REGISTER_FIFO_TAG_PPG2_LEDC2_DATA					8U
#define MAX86161_REGISTER_FIFO_TAG_PPG2_LEDC3_DATA					9U
#define MAX86161_REGISTER_FIFO_TAG_PPG2_LEDC4_DATA					10U
#define MAX86161_REGISTER_FIFO_TAG_PPG2_LEDC5_DATA					11U
#define MAX86161_REGISTER_FIFO_TAG_PPG2_LEDC6_DATA					12U
#define MAX86161_REGISTER_FIFO_TAG_PPF1_LEDC1_DATA					13U
#define MAX86161_REGISTER_FIFO_TAG_PPF1_LEDC2_DATA					14U
#define MAX86161_REGISTER_FIFO_TAG_PPF1_LEDC3_DATA					15U
#define MAX86161_REGISTER_FIFO_TAG_PPF2_LEDC1_DATA					19U
#define MAX86161_REGISTER_FIFO_TAG_PPF2_LEDC2_DATA					20U
#define MAX86161_REGISTER_FIFO_TAG_PPF2_LEDC3_DATA					21U
#define MAX86161_REGISTER_FIFO_TAG_PROX1_DATA						25U
#define MAX86161_REGISTER_FIFO_TAG_PROX2_DATA						26U
#define MAX86161_REGISTER_FIFO_TAG_SUB_DAC_UPDATE					29U
#define MAX86161_REGISTER_FIFO_TAG_INVALID_DATA						30U
#define MAX86161_REGISTER_FIFO_TAG_TIME_STAMP						31U
/*
 * FIFO register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * FIFO WRITE POINTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_FIFO_WRITE_POINTER_MASK					0x7F
/*
 * FIFO WRITE POINTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * FIFO READ POINTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_FIFO_READ_POINTER_MASK					0x7F
/*
 * FIFO READ POINTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * OVER FLOW COUNTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_FIFO_OVER_FLOW_COUNTER_MASK				0x7F
/*
 * OVER FLOW COUNTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * FIFO CONFIGURATION 1 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_128	0U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_127	1U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_126	2U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_125	3U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_124	4U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_123	5U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_122	6U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_121	7U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_120	8U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_119	9U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_118	10U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_117	11U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_116	12U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_115	13U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_114	14U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_113	15U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_112	16U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_111	17U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_110	18U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_109	19U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_108	20U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_107	21U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_106	22U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_105	23U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_104	24U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_103	25U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_102	26U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_101	27U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_100	28U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_99	29U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_98	30U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_97	31U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_96	32U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_95	33U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_94	34U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_93	35U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_92	36U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_91	37U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_90	38U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_89	39U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_88	40U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_87	41U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_86	42U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_85	43U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_84	44U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_83	45U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_82	46U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_81	47U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_80	48U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_79	49U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_78	50U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_77	51U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_76	52U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_75	53U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_74	54U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_73	55U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_72	56U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_71	57U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_70	58U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_69	59U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_68	60U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_67	61U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_66	62U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_65	63U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_64	64U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_63	65U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_62	66U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_61	67U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_60	68U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_59	69U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_58	70U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_57	71U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_56	72U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_55	73U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_54	74U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_53	75U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_52	76U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_51	77U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_50	78U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_49	79U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_48	80U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_47	81U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_46	82U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_45	83U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_44	84U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_43	85U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_42	86U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_41	87U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_40	88U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_39	89U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_38	90U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_37	91U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_36	92U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_35	93U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_34	94U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_33	95U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_32	96U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_31	97U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_30	98U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_29	99U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_28	100U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_27	101U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_26	102U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_25	103U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_24	104U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_23	105U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_22	106U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_21	107U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_20	108U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_19	109U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_18	110U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_17	111U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_16	112U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_15	113U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_14	114U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_13	115U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_12	116U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_11	117U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_10	118U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_9	119U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_8	120U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_7	121U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_6	122U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_5	123U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_4	124U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_3	125U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_2	126U
#define MAX86161_REGISTER_FIFO_FIFO_CONFIGURATION_1_FIFO_A_FULL_1	127U
/*
 * FIFO CONFIGURATION 1 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * FIFO CONFIGURATION 2 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_FIFO_CONFIGURATION_2_FLUSH_FIFO_POS		4U
#define MAX86161_REGISTER_FIFO_CONFIGURATION_2_FLUSH_FIFO			1U << MAX86161_REGISTER_FIFO_CONFIGURATION_2_FLUSH_FIFO_POS

#define MAX86161_REGISTER_FIFO_CONFIGURATION_2_FIFO_STAT_CLR_POS	3U
#define MAX86161_REGISTER_FIFO_CONFIGURATION_2_FIFO_STAT_CLR		1U << MAX86161_REGISTER_FIFO_CONFIGURATION_2_FIFO_STAT_CLR_POS

#define MAX86161_REGISTER_FIFO_CONFIGURATION_2_A_FULL_TYPE_POS		2U
#define MAX86161_REGISTER_FIFO_CONFIGURATION_2_A_FULL_TYPE			1U << MAX86161_REGISTER_FIFO_CONFIGURATION_2_A_FULL_TYPE_POS

#define MAX86161_REGISTER_FIFO_CONFIGURATION_2_FIFO_RO_POS			1U
#define MAX86161_REGISTER_FIFO_CONFIGURATION_2_FIFO_RO				1U << MAX86161_REGISTER_FIFO_CONFIGURATION_2_FIFO_RO_POS
/*
 * FIFO CONFIGURATION 2 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * SYSTEM CONTROL register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_SYSTEM_CONTROL_SINGLE_PPG_POS				3U
#define MAX86161_REGISTER_SYSTEM_CONTROL_SINGLE_PPG					1U << MAX86161_REGISTER_SYSTEM_CONTROL_SINGLE_PPG_POS

#define MAX86161_REGISTER_SYSTEM_CONTROL_LP_MODE_POS				2U
#define MAX86161_REGISTER_SYSTEM_CONTROL_LP_MODE					1U << MAX86161_REGISTER_SYSTEM_CONTROL_LP_MODE_POS

#define MAX86161_REGISTER_SYSTEM_CONTROL_SHDN_POS					1U
#define MAX86161_REGISTER_SYSTEM_CONTROL_SHDN						1U << MAX86161_REGISTER_SYSTEM_CONTROL_SHDN_POS

#define MAX86161_REGISTER_SYSTEM_CONTROL_RESET_POS					0U
#define MAX86161_REGISTER_SYSTEM_CONTROL_RESET						1U << MAX86161_REGISTER_SYSTEM_CONTROL_RESET_POS
/*
 * SYSTEM CONTROL register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * PPG SYNC CONTROL register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_PPG_SYNC_CONTROL_TIME_STAMP_EN_POS		7U
#define MAX86161_REGISTER_PPG_SYNC_CONTROL_TIME_STAMP_EN			1U << MAX86161_REGISTER_PPG_SYNC_CONTROL_TIME_STAMP_EN_POS

#define MAX86161_REGISTER_PPG_SYNC_CONTROL_DAC_CODE_CHG_TAG_POS		6U
#define MAX86161_REGISTER_PPG_SYNC_CONTROL_DAC_CODE_CHG_TAG			1U << MAX86161_REGISTER_PPG_SYNC_CONTROL_DAC_CODE_CHG_TAG_POS

#define MAX86161_REGISTER_PPG_SYNC_CONTROL_SW_FORCE_SYNC_POS		4U
#define MAX86161_REGISTER_PPG_SYNC_CONTROL_SW_FORCE_SYNC			1U << MAX86161_REGISTER_PPG_SYNC_CONTROL_SW_FORCE_SYNC_POS

#define MAX86161_REGISTER_PPG_SYNC_CONTROL_GPIO_CTRL_POS				0U
#define MAX86161_REGISTER_PPG_SYNC_CONTROL_GPIO_CTRL_THREE_STATE		0U << MAX86161_REGISTER_PPG_SYNC_CONTROL_GPIO_CTRL_POS
#define MAX86161_REGISTER_PPG_SYNC_CONTROL_GPIO_CTRL_IN_TRIGGER			2U << MAX86161_REGISTER_PPG_SYNC_CONTROL_GPIO_CTRL_POS
#define MAX86161_REGISTER_PPG_SYNC_CONTROL_GPIO_CTRL_EXPOSE_IN_TRIGGER	6U << MAX86161_REGISTER_PPG_SYNC_CONTROL_GPIO_CTRL_POS
#define MAX86161_REGISTER_PPG_SYNC_CONTROL_GPIO_CTRL_IN_SYNC			9U << MAX86161_REGISTER_PPG_SYNC_CONTROL_GPIO_CTRL_POS
#define MAX86161_REGISTER_PPG_SYNC_CONTROL_GPIO_CTRL_SAMPLE_SYNC		10U << MAX86161_REGISTER_PPG_SYNC_CONTROL_GPIO_CTRL_POS
/*
 * PPG SYNC CONTROL register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/* PPG CONFIGURATION 1 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_PPG_CONFIGURATION_1_ALC_DISABLE_POS		7U
#define MAX86161_REGISTER_PPG_CONFIGURATION_1_ALC_DISABLE			1U << MAX86161_REGISTER_PPG_CONFIGURATION_1_ALC_DISABLE_POS

#define MAX86161_REGISTER_PPG_CONFIGURATION_1_ADD_OFFSET_POS		6U
#define MAX86161_REGISTER_PPG_CONFIGURATION_1_ADD_OFFSET			1U << MAX86161_REGISTER_PPG_CONFIGURATION_1_ADD_OFFSET_POS

#define MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG1_ADC_RGE_POS		2U
#define MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG1_ADC_RGE_4096		0U << MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG1_ADC_RGE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG1_ADC_RGE_8196		1U << MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG1_ADC_RGE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG1_ADC_RGE_16384	2U << MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG1_ADC_RGE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG1_ADC_RGE_32768	3U << MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG1_ADC_RGE_POS

/*
 * PPG CONFIGURATION 1 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/* PPG CONFIGURATION 1 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG_TINT_POS			0U
#define MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG_TINT_14800_NS		0U << MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG_TINT_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG_TINT_29400_NS		1U << MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG_TINT_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG_TINT_58700_NS		2U << MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG_TINT_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG_TINT_117300_NS	3U << MAX86161_REGISTER_PPG_CONFIGURATION_1_PPG_TINT_POS
/*
 * PPG CONFIGURATION 1 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */


/*
 * PPG CONFIGURATION 2 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS			3U
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_24_995_HZ		0x00 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_50_027_HZ		0x01 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_84_021_HZ		0x02 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_99_902_HZ		0x03 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_199_805_HZ		0x04 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_399_610_HZ		0x05 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_24_995_HZ_2	0x06 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_50_027_HZ_2	0x07 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_84_021_HZ_2	0x08 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_99_902_HZ_2	0x09 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_8_HZ			0x0A << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_16_HZ			0x0B << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_32_HZ			0x0C << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_64_HZ			0x0D << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_128_HZ			0x0E << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_256_HZ			0x0F << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_512_HZ			0x10 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_1024_HZ		0x11 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_2048_HZ		0x12 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_4096_HZ		0x13 << MAX86161_REGISTER_PPG_CONFIGURATION_2_PPG_SR_POS

#define MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_POS			0U
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_1				0U << MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_2				1U << MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_4				2U << MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_8				3U << MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_16			4U << MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_32			5U << MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_64			6U << MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_128			7U << MAX86161_REGISTER_PPG_CONFIGURATION_2_SMP_AVE_POS
/*
 * PPG CONFIGURATION 2 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * PPG CONFIGURATION 3 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_PPG_CONFIGURATION_3_LED_SETLNG_POS			6U
#define MAX86161_REGISTER_PPG_CONFIGURATION_3_LED_SETLNG_4_US			0U << MAX86161_REGISTER_PPG_CONFIGURATION_3_LED_SETLNG_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_3_LED_SETLNG_6_US			1U << MAX86161_REGISTER_PPG_CONFIGURATION_3_LED_SETLNG_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_3_LED_SETLNG_8_US			2U << MAX86161_REGISTER_PPG_CONFIGURATION_3_LED_SETLNG_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_3_LED_SETLNG_12_US			3U << MAX86161_REGISTER_PPG_CONFIGURATION_3_LED_SETLNG_POS

#define MAX86161_REGISTER_PPG_CONFIGURATION_3_DIG_FILT_SEL_POS			5U
#define MAX86161_REGISTER_PPG_CONFIGURATION_3_DIG_FILT_SEL				1U << MAX86161_REGISTER_PPG_CONFIGURATION_3_DIG_FILT_SEL_POS

#define MAX86161_REGISTER_PPG_CONFIGURATION_3_BURST_RATE_POS			1U
#define MAX86161_REGISTER_PPG_CONFIGURATION_3_BURST_RATE_8_HZ			0U << MAX86161_REGISTER_PPG_CONFIGURATION_3_BURST_RATE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_3_BURST_RATE_32_HZ			1U << MAX86161_REGISTER_PPG_CONFIGURATION_3_BURST_RATE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_3_BURST_RATE_84_HZ			2U << MAX86161_REGISTER_PPG_CONFIGURATION_3_BURST_RATE_POS
#define MAX86161_REGISTER_PPG_CONFIGURATION_3_BURST_RATE_256_HZ			3U << MAX86161_REGISTER_PPG_CONFIGURATION_3_BURST_RATE_POS

#define MAX86161_REGISTER_PPG_CONFIGURATION_3_BURST_EN_POS				0U
#define MAX86161_REGISTER_PPG_CONFIGURATION_3_BURST_EN					1U << MAX86161_REGISTER_PPG_CONFIGURATION_3_BURST_EN_POS
/*
 * PPG CONFIGURATION 3 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * PHOTO DIODE BIAS register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS2_POS					4U
#define MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS2_65_PF				0U << MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS2_POS
#define MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS2_130_PF				1U << MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS2_POS
#define MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS2_260_PF				2U << MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS2_POS
#define MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS2_520_PF				3U << MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS2_POS

#define MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS1_POS					0U
#define MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS1_65_PF				0U << MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS1_POS
#define MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS1_130_PF				1U << MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS1_POS
#define MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS1_260_PF				2U << MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS1_POS
#define MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS1_520_PF				3U << MAX86161_REGISTER_PHOTO_DIODE_BIAS_PDBIAS1_POS
/*
 * PHOTO DIODE BIAS register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */



/*
 * PICKET FENCE register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_PICKET_FENCE_PF_ENABLE_POS					7U
#define MAX86161_REGISTER_PICKET_FENCE_PF_ENABLE						1U << MAX86161_REGISTER_PICKET_FENCE_PF_ENABLE_POS

#define MAX86161_REGISTER_PICKET_FENCE_PF_ORDER_POS						6U
#define MAX86161_REGISTER_PICKET_FENCE_PF_ORDER							1U << MAX86161_REGISTER_PICKET_FENCE_PF_ORDER_POS

#define MAX86161_REGISTER_PICKET_FENCE_IIR_TC_POS						4U
#define MAX86161_REGISTER_PICKET_FENCE_IIR_TC_64						0U << MAX86161_REGISTER_PICKET_FENCE_IIR_TC_POS
#define MAX86161_REGISTER_PICKET_FENCE_IIR_TC_32						1U << MAX86161_REGISTER_PICKET_FENCE_IIR_TC_POS
#define MAX86161_REGISTER_PICKET_FENCE_IIR_TC_16						2U << MAX86161_REGISTER_PICKET_FENCE_IIR_TC_POS
#define MAX86161_REGISTER_PICKET_FENCE_IIR_TC_8							3U << MAX86161_REGISTER_PICKET_FENCE_IIR_TC_POS

#define MAX86161_REGISTER_PICKET_FENCE_IIR_INIT_VALUE_POS				2U
#define MAX86161_REGISTER_PICKET_FENCE_IIR_INIT_VALUE_64				0U << MAX86161_REGISTER_PICKET_FENCE_IIR_INIT_VALUE_POS
#define MAX86161_REGISTER_PICKET_FENCE_IIR_INIT_VALUE_48				1U << MAX86161_REGISTER_PICKET_FENCE_IIR_INIT_VALUE_POS
#define MAX86161_REGISTER_PICKET_FENCE_IIR_INIT_VALUE_32				2U << MAX86161_REGISTER_PICKET_FENCE_IIR_INIT_VALUE_POS
#define MAX86161_REGISTER_PICKET_FENCE_IIR_INIT_VALUE_24				3U << MAX86161_REGISTER_PICKET_FENCE_IIR_INIT_VALUE_POS

#define MAX86161_REGISTER_PICKET_FENCE_THRESHOLD_SIGMA_MULT_POS			0U
#define MAX86161_REGISTER_PICKET_FENCE_THRESHOLD_SIGMA_MULT_GAIN_4		0U << MAX86161_REGISTER_PICKET_FENCE_THRESHOLD_SIGMA_MULT_POS
#define MAX86161_REGISTER_PICKET_FENCE_THRESHOLD_SIGMA_MULT_GAIN_8		1U << MAX86161_REGISTER_PICKET_FENCE_THRESHOLD_SIGMA_MULT_POS
#define MAX86161_REGISTER_PICKET_FENCE_THRESHOLD_SIGMA_MULT_GAIN_16		2U << MAX86161_REGISTER_PICKET_FENCE_THRESHOLD_SIGMA_MULT_POS
#define MAX86161_REGISTER_PICKET_FENCE_THRESHOLD_SIGMA_MULT_GAIN_32		3U << MAX86161_REGISTER_PICKET_FENCE_THRESHOLD_SIGMA_MULT_POS
/*
 * PICKET FENCE register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * LED SEQUENCE REGISTER 1 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_NONE				0U
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED1				1U
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED2				2U
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED3				3U
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_PILOT_LED1		8U
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_DIRECT_AMBIENT	9U

#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_POS				4U
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_NONE			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_NONE << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_LED1			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED1 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_LED2			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED2 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_LED3			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED3 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_PILOT_LED1		MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_PILOT_LED1 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_DIRECT_AMBIENT	MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_DIRECT_AMBIENT << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC2_POS

#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_POS				0U
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_NONE			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_NONE << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_LED1			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED1 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_LED2			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED2 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_LED3			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED3 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_PILOT_LED1		MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_PILOT_LED1 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_DIRECT_AMBIENT	MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_DIRECT_AMBIENT << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_1_LEDC1_POS
/*
 * LED SEQUENCE REGISTER 1 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * LED SEQUENCE REGISTER 2 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_POS				4U
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_NONE			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_NONE << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_LED1			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED1 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_LED2			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED2 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_LED3			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED3 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_PILOT_LED1		MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_PILOT_LED1 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_DIRECT_AMBIENT	MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_DIRECT_AMBIENT << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC4_POS

#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_POS				0U
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_NONE			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_NONE << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_LED1			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED1 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_LED2			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED2 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_LED3			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED3 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_PILOT_LED1		MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_PILOT_LED1 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_DIRECT_AMBIENT	MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_DIRECT_AMBIENT << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_2_LEDC3_POS
/*
 * LED SEQUENCE REGISTER 2 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * LED SEQUENCE REGISTER 3 register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_POS				4U
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_NONE			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_NONE << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_LED1			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED1 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_LED2			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED2 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_LED3			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED3 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_PILOT_LED1		MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_PILOT_LED1 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_DIRECT_AMBIENT	MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_DIRECT_AMBIENT << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC6_POS

#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_POS				0U
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_NONE			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_NONE << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_LED1			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED1 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_LED2			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED2 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_LED3			MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_LED3 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_PILOT_LED1		MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_PILOT_LED1 << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_POS
#define MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_DIRECT_AMBIENT	MAX86161_REGISTER_LED_SEQUENCE_REGISTER_LEDCN_DIRECT_AMBIENT << MAX86161_REGISTER_LED_SEQUENCE_REGISTER_3_LEDC5_POS
/*
 * LED SEQUENCE REGISTER 3 register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */


/*
 * LED1 PA REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_LED_PA_LEDX_RGE_31							0U
#define MAX86161_REGISTER_LED_PA_LEDX_RGE_62							1U
#define MAX86161_REGISTER_LED_PA_LEDX_RGE_93							2U
#define MAX86161_REGISTER_LED_PA_LEDX_RGE_124							3U

#define MAX86161_REGISTER_LED_PA(LEDX_RGE, LEDX_PA_CURRENT)({								\
	int ledCurrent = LEDX_PA_CURRENT;														\
	float ration = 0.486;																	\
	int ledRange = LEDX_RGE;																\
	float result = ((float)(ledCurrent) / ration) * (((float)(ledRange) + 1.0f) / 4.0f);	\
	(int)result;																			\
})

/*
 * LED1 PA REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * LED2 PA REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * LED2 PA REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * LED3 PA REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * LED3 PA REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * LED RANGE 1 REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_LED_RANGE1_LED1_RGE_POS					0U
#define MAX86161_REGISTER_LED_RANGE1_LED1_RGE_31					MAX86161_REGISTER_LED_PA_LEDX_RGE_31 << MAX86161_REGISTER_LED_RANGE1_LED1_RGE_POS
#define MAX86161_REGISTER_LED_RANGE1_LED1_RGE_62					MAX86161_REGISTER_LED_PA_LEDX_RGE_62 << MAX86161_REGISTER_LED_RANGE1_LED1_RGE_POS
#define MAX86161_REGISTER_LED_RANGE1_LED1_RGE_93					MAX86161_REGISTER_LED_PA_LEDX_RGE_93 << MAX86161_REGISTER_LED_RANGE1_LED1_RGE_POS
#define MAX86161_REGISTER_LED_RANGE1_LED1_RGE_124					MAX86161_REGISTER_LED_PA_LEDX_RGE_124 << MAX86161_REGISTER_LED_RANGE1_LED1_RGE_POS

#define MAX86161_REGISTER_LED_RANGE1_LED2_RGE_POS					2U
#define MAX86161_REGISTER_LED_RANGE1_LED2_RGE_31					MAX86161_REGISTER_LED_PA_LEDX_RGE_31 << MAX86161_REGISTER_LED_RANGE1_LED2_RGE_POS
#define MAX86161_REGISTER_LED_RANGE1_LED2_RGE_62					MAX86161_REGISTER_LED_PA_LEDX_RGE_62 << MAX86161_REGISTER_LED_RANGE1_LED2_RGE_POS
#define MAX86161_REGISTER_LED_RANGE1_LED2_RGE_93					MAX86161_REGISTER_LED_PA_LEDX_RGE_93 << MAX86161_REGISTER_LED_RANGE1_LED2_RGE_POS
#define MAX86161_REGISTER_LED_RANGE1_LED2_RGE_124					MAX86161_REGISTER_LED_PA_LEDX_RGE_124 << MAX86161_REGISTER_LED_RANGE1_LED2_RGE_POS

#define MAX86161_REGISTER_LED_RANGE1_LED3_RGE_POS					4U
#define MAX86161_REGISTER_LED_RANGE1_LED3_RGE_31					MAX86161_REGISTER_LED_PA_LEDX_RGE_31 << MAX86161_REGISTER_LED_RANGE1_LED3_RGE_POS
#define MAX86161_REGISTER_LED_RANGE1_LED3_RGE_62					MAX86161_REGISTER_LED_PA_LEDX_RGE_62 << MAX86161_REGISTER_LED_RANGE1_LED3_RGE_POS
#define MAX86161_REGISTER_LED_RANGE1_LED3_RGE_93					MAX86161_REGISTER_LED_PA_LEDX_RGE_93 << MAX86161_REGISTER_LED_RANGE1_LED3_RGE_POS
#define MAX86161_REGISTER_LED_RANGE1_LED3_RGE_124					MAX86161_REGISTER_LED_PA_LEDX_RGE_124 << MAX86161_REGISTER_LED_RANGE1_LED3_RGE_POS
/*
 * LED RANGE 1 REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * S1 HI RES DAC1 REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_S1_HI_RES_DAC1_S1_HRES_DAC1_OVR_POS		7U
#define MAX86161_REGISTER_S1_HI_RES_DAC1_S1_HRES_DAC1_OVR_OFF		0 << 7U
#define MAX86161_REGISTER_S1_HI_RES_DAC1_S1_HRES_DAC1_OVR_ON		1 << 7U
/*
 * S1 HI RES DAC1 REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * S2 HI RES DAC1 REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_S2_HI_RES_DAC1_S2_HRES_DAC1_OVR_POS		7U
#define MAX86161_REGISTER_S2_HI_RES_DAC1_S2_HRES_DAC1_OVR_OFF		0 << 7U
#define MAX86161_REGISTER_S2_HI_RES_DAC1_S2_HRES_DAC1_OVR_ON		1 << 7U
/*
 * S2 HI RES DAC1 REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * S3 HI RES DAC1 REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_S3_HI_RES_DAC1_S3_HRES_DAC1_OVR_POS		7U
#define MAX86161_REGISTER_S3_HI_RES_DAC1_S3_HRES_DAC1_OVR_OFF		0 << 7U
#define MAX86161_REGISTER_S3_HI_RES_DAC1_S3_HRES_DAC1_OVR_ON		1 << 7U
/*
 * S3 HI RES DAC1 REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * S4 HI RES DAC1 REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_S4_HI_RES_DAC1_S4_HRES_DAC1_OVR_POS		7U
#define MAX86161_REGISTER_S4_HI_RES_DAC1_S4_HRES_DAC1_OVR_OFF		0 << 7U
#define MAX86161_REGISTER_S4_HI_RES_DAC1_S4_HRES_DAC1_OVR_ON		1 << 7U
/*
 * S4 HI RES DAC1 REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * S5 HI RES DAC1 REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_S5_HI_RES_DAC1_S5_HRES_DAC1_OVR_POS		7U
#define MAX86161_REGISTER_S5_HI_RES_DAC1_S5_HRES_DAC1_OVR_OFF		0 << 7U
#define MAX86161_REGISTER_S5_HI_RES_DAC1_S5_HRES_DAC1_OVR_ON		1 << 7U
/*
 * S5 HI RES DAC1 REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * S6 HI RES DAC1 REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_S6_HI_RES_DAC1_S6_HRES_DAC1_OVR_POS		7U
#define MAX86161_REGISTER_S6_HI_RES_DAC1_S6_HRES_DAC1_OVR_OFF		0 << 7U
#define MAX86161_REGISTER_S6_HI_RES_DAC1_S6_HRES_DAC1_OVR_ON		1 << 7U
/*
 * S6 HI RES DAC1 REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * DIE TEMPERATURE CONFIGURATION REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_DIE_TEMPERATURE_CONFIGURATION_EN			1U
/*
 * DIE TEMPERATURE CONFIGURATION REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * DIE TEMPERATURE FRACTION REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_DIE_TEMPERATURE_FRACTION_MASK				0x0F
/*
 * DIE TEMPERATURE FRACTION REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * DAC CALIBRATION ENABLE REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_DAC_CALIBRATION_ENABLE_CAL_DAC_COMPLETE_POS	6U
#define MAX86161_REGISTER_DAC_CALIBRATION_ENABLE_CAL_DAC_COMPLETE		1U << MAX86161_REGISTER_DAC_CALIBRATION_ENABLE_CAL_DAC_COMPLETE_POS
#define MAX86161_REGISTER_DAC_CALIBRATION_ENABLE_CAL_DAC2_OOR_POS		5U
#define MAX86161_REGISTER_DAC_CALIBRATION_ENABLE_CAL_DAC2_OOR			1U << MAX86161_REGISTER_DAC_CALIBRATION_ENABLE_CAL_DAC2_OOR_POS
#define MAX86161_REGISTER_DAC_CALIBRATION_ENABLE_CAL_DAC1_OOR_POS		4U
#define MAX86161_REGISTER_DAC_CALIBRATION_ENABLE_CAL_DAC1_OOR			1U << MAX86161_REGISTER_DAC_CALIBRATION_ENABLE_CAL_DAC1_OOR_POS
#define MAX86161_REGISTER_DAC_CALIBRATION_ENABLE_START_CAL_POS			2U
#define MAX86161_REGISTER_DAC_CALIBRATION_ENABLE_START_CAL				1U << MAX86161_REGISTER_DAC_CALIBRATION_ENABLE_START_CAL_POS
/*
 * DAC CALIBRATION ENABLE REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * SHA CONFIGURATION REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_SHA_CONFIGURATION_SHA_EN_POS								1U
#define MAX86161_REGISTER_SHA_CONFIGURATION_SHA_EN									1U << MAX86161_REGISTER_SHA_CONFIGURATION_SHA_EN_POS
#define MAX86161_REGISTER_SHA_CONFIGURATION_SHA_START_POS							0U
#define MAX86161_REGISTER_SHA_CONFIGURATION_SHA_START								1U << MAX86161_REGISTER_SHA_CONFIGURATION_SHA_START_POS
/*
 * SHA CONFIGURATION REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */

/*
 * MEMORY CONTROL REGISTER register section begin
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */
#define MAX86161_REGISTER_MEMORY_CONTROL_MEM_WR_EN_POS					1U
#define MAX86161_REGISTER_MEMORY_CONTROL_MEM_WR_EN						1U << MAX86161_REGISTER_MEMORY_CONTROL_MEM_WR_EN_POS
#define MAX86161_REGISTER_MEMORY_CONTROL_BANK_SEL_POS					0U
#define MAX86161_REGISTER_MEMORY_CONTROL_BANK_SEL						1U << MAX86161_REGISTER_MEMORY_CONTROL_BANK_SEL_POS
/*
 * MEMORY CONTROL REGISTER register section end
 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
 */


#define MAX86161_STATE_IDLE													0U
#define MAX86161_STATE_START												1U
#define MAX86161_STATE_READING_REVISION_ID									2U
#define MAX86161_STATE_READING_PART_ID										3U
#define MAX86161_STATE_RESET												4U
#define MAX86161_STATE_SHUTDOWN												6U
#define MAX86161_STATE_POWER_UP												7U
#define MAX86161_STATE_CLEAR_INTERRUPT1										8U
#define MAX86161_STATE_CLEAR_INTERRUPT2										9U
#define MAX86161_STATE_POWER_READY											10U
#define MAX86161_STATE_WRITE_CONFIGURATIONS									11U
#define MAX86161_STATE_READ_CONFIGURATIONS									12U
#define MAX86161_STATE_READ_PPG												13U
#define MAX86161_STATE_READ_PPG_STATUS										14U
#define MAX86161_STATE_READ_FIFO_READ_POINTER								15U
#define MAX86161_STATE_READ_FIFO_WRITE_POINTER								16U
#define MAX86161_STATE_READ_FIFO_DATA										17U
#define MAX86161_STATE_READ_FIFO_READ_COUNTER								18U
#define MAX86161_STATE_READ_INTERRUPT_STATUS1								19U
#define MAX86161_STATE_STOPPED												20U


#define MAX86161_ERROR_NONE													0U
#define MAX86161_ERROR_INVALID_PART_ID										1U
#define MAX86161_ERROR_COMMUNICATION_FAILED									2U

#define MAX86161_MODE_SPO2													0U
#define MAX86161_MODE_HR													1U
#define MAX86161_MODE_MULTI													2U

#define MAX86161_I2C_STATE_COMPLETED										0U
#define MAX86161_I2C_STATE_START											1U
#define MAX86161_I2C_STATE_SEND_ADDRESS										2U
#define MAX86161_I2C_STATE_SEND_DATA										3U
#define MAX86161_I2C_STATE_RECEIVE_DATA										4U

#define MAX86161_I2C_ACTION_WRITE_DATA										0U
#define MAX86161_I2C_ACTION_READ_DATA										1U

typedef struct {
	int32_t redSample;
	int32_t irSample;
	int32_t greenSample;
} MAXM86161PPGData_t;

typedef uint8_t (*MAX86161ReadInterruptStateFunction)();
typedef void (*MAX86161EnableInterruptFunction)();
typedef void (*MAX86161DisableInterruptFunction)();
typedef void (*MAX86161PPGDataCallback_t)(MAXM86161PPGData_t* ppgEvent);

typedef struct {
	I2C_t* i2c;
	MAX86161ReadInterruptStateFunction readInterruptStateFunction;
	MAX86161EnableInterruptFunction enableInterruptFunction;
	MAX86161DisableInterruptFunction disableInterruptFunction;
	MAX86161PPGDataCallback_t ppgDataCallback;
} MAX86161Settings_t;

typedef struct {
	MAX86161Settings_t* settings;
	uint8_t currentState;
	uint8_t isReadStarted;
	uint8_t isConfigurated;
	uint8_t txBuffer[MAX86161_TXRX_BUFFER_LENGTH];
	uint8_t rxBuffer[MAX86161_TXRX_BUFFER_LENGTH];
	uint8_t error;
	uint8_t revID;
	uint8_t partId;
	uint8_t i2cState;
	uint8_t i2cAction;
	uint16_t i2cDataSize;
	uint8_t fifoWritePointer;
	uint8_t fifoReadPointer;
	uint8_t fifoAvailableDataCount;
	QueueHandle_t txSerialQueue;
	QueueHandle_t rxSerialQueue;
	MAXM86161PPGData_t currentDataSample;
} MAX86161Device_t;


void max86161Init(MAX86161Device_t* device);
void max86161DeInit(MAX86161Device_t* device);
void max86161Start(MAX86161Device_t* device);
void max86161Stop(MAX86161Device_t* device);
void max86161Tick(MAX86161Device_t* device);

void max86161InterruptTopHalfHandler(MAX86161Device_t* device);
void max86161InterruptBottomHalfHandler(MAX86161Device_t* device);


#endif /* INC_DEVICES_PPG_MAX86161_H_ */
